Adobe PDF
(1 MB)
| Title Details: | |
|
Laboratory Exercise: Accelerating operation chain on Xilinx Pynq |
|
| Authors: |
Dasygenis, Minas Soudris, Dimitrios |
| Description: | |
| Abstract: |
A distinctive architecture is Pynq, which showcases heterogeneity in processing cores as it carries an ARM processor and a reconfigurable FPGA architecture. In this assignment, students will learn how to program, configure and exploit such an architecture for IoT applications, specifically for the creation through Python and the use of accelerators (overlays) for the acceleration of a signal processing filter.
|
| Linguistic Editors: |
Kagiadaki, Sofia |
| Technical Editors: |
Dasygenis, Minas |
| Graphic Editors: |
Dasygenis, Minas |
| Type: |
Chapter |
| Creation Date: | 28-08-2024 |
| Item Details: | |
| License: |
Attribution - NonCommercial - ShareAlike 4.0 International (CC BY-NC-SA 4.0) |
| Handle | http://hdl.handle.net/11419/13878 |
| Bibliographic Reference: | Dasygenis, M., & Soudris, D. (2024). Laboratory Exercise: Accelerating operation chain on Xilinx Pynq [Chapter]. In Dasygenis, M., & Soudris, D. 2024. Internet of Things Computing [Undergraduate textbook]. Kallipos, Open Academic Editions. https://hdl.handle.net/11419/13878 |
| Language: |
Greek |
| Is Part of: |
Internet of Things Computing |
| Publication Origin: |
Kallipos, Open Academic Editions |